We report on the design, simulation and characterization of a solid-state W-band in-phase power-combined frequency tripler. In order to increase the output power of the frequency tripler without sacrificing efficiency and bandwidth, two mirror-image tripler circuits with four UMS® Schottky varistor diode chips are designed and mounted in a waveguide block, which includes a compact double-probe power divider at the input waveguide and a Y-junction power combiner at the output waveguide, respectively. Each circuit chip features four anodes on a 50 mil thick Rogers RT/duroid 5880 substrate. The tripler has 1.2~3.8 % conversion efficiency measured across the 75~110 GHz band when driven with 24 dBm of input power at room temperature. With the input power of 27 dBm, 5.5~11 dBm of saturated output power is produced over 75~110 GHz. Suppression of undesired harmonics is greater than 17 dB.
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