The matched filter (MF) is known as the fastest method for acquisition of DS-CDMA signals. Power consumption of the MF is a key issue for realizing multimedia hand-held terminals. We proposed a new Analog Matched Filter using Sample-and-Hold (S/H) circuit, which performs correlation between an input signal and a filtering coefficient employed for modulation in fully analog domain, eliminating the need to Analog-to-digital (A/D) conversion, so reduces power consumption and chip area. Simulation results reveal that the proposed circuit dissipates 2.3 mW power consumption at a chip rate of 16.7 MHz with 3.3 V power supply for 15 taps configuration. The proposed analog architecture could improve the performance of mobile terminals.
2. Lee, W. C., "Overview of celluler CDMA," IEEE Transaction Vehicular Technology, Vol. 40, No. 2, 291-302, 1991.
3. Chen, J., G. Shou, and C. Zhou, "High-speed low-power matched filter for W-CDMA: Algorithm and VLSI-architecture," IEICE Trans. Fundamentals, Vol. E83-A, No. 1, 75-81, 2000.
4. Figueroa, M., D. Hsu, and C. Diorio, "A mixed-signal approach to high-performance low-power linear filters," IEEE J. Solid State Circuits, Vol. 36, No. 5, 264-270, 2001.
5. Onodera, K. K. and P. R. Gray, "A 75-mW 128-MHz DS-CDMA base-band demodulator for high-speed wireless applications," IEEE J. Solid State Circuits, Vol. 33, No. 5, 753-761, 1998.
6. Baier, A., "A low cost digital matched filter for arabitrary constant-envelope spread-spectrum wave-forms," IEEE Transaction on Communications, Vol. 32, 354-361, 1984.
7. Kataoka, N., T. Kojima, M. Miyake, and T. Fujino, "Performance of soft decision digitqal matched filter in direct-sequence spread-spectrum communication systems," IEICE Transaction, Vol. E74, 1115-1122, 1991.
8. Wu, J., M. Liou, H. Ma, and T. Chiueh, "A 2.6 V, 44-MHz all digital QPSK digital-sequence spread spectrum transceiver IC," IEEE J. Solid-state Circuit, Vol. 32, 1499-1510, 1997.
9. Slater, D. and J. Paulos, "Low volatge coefficient capacitors for VLSI processes," IEEE J. Solid State Circuits, Vol. 33, No. 5, 753-761, 1998.
10. Sheu, B. and C. Hu, "Switched-induced error voltage on a switched capacitor," IEEE J. Solid State Circuits, Vol. SC-19, No. 4, 519-525, 1984.
11. Wegmann, G., E. Vittoz, and F. Rahali, "Charge injection in analog MOS switches," IEEE J. Solid State Circuits, Vol. SC-22, No. 6, 1091-1097, 1987.
12. Shyu, J. B., G. C. Temes, and F. Krummenacher, "Random errors effects in matched MOS capacitors and current sources," IEEE J. Solid State Circuits, Vol. SC-19, 948-955, 1984.
13. Yoon, Y. C. and H. Leib, Matched filtering in improper complex noise and applications to DS-CDMA, Conference Recordings PIMRC'95, 701-705, Toronto, Canada, 1995.