Vol. 46

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2012-12-07

A Noise Suppression Technique Using Dual Layer Spirals with Various Ground Structure for High-Speed Pcbs

By Tong-Ho Chung, Hee-Do Kang, Tae-Lim Song, and Jong-Gwan Yook
Progress In Electromagnetics Research B, Vol. 46, 337-356, 2013
doi:10.2528/PIERB12102904

Abstract

In this paper, small dual layer spirals with several various ground structure are applied in the vicinity of the DDR3 high-speed circuit to achieve noise suppression characteristics up to 3.2 GHz region. For wider noise suppression bandwidth, the dual layer spirals with various ground structure, which provide high self resonance frequency (SRF) as well as inductance value, are implemented. The proposed dual layer spiral with various ground clearance dimension exhibits greater than 9 dB power noise suppression characteristics in the frequency range of interests and achieve about 50% voltage fluctuation reduction in time domain compare to the reference case model. To validate the effectiveness of the proposed model, sample PCB are fabricated and measured. It shows good agreement between the measured and simulated results up to 3.2 GHz.

Citation


Tong-Ho Chung, Hee-Do Kang, Tae-Lim Song, and Jong-Gwan Yook, "A Noise Suppression Technique Using Dual Layer Spirals with Various Ground Structure for High-Speed Pcbs," Progress In Electromagnetics Research B, Vol. 46, 337-356, 2013.
doi:10.2528/PIERB12102904
http://www.jpier.org/PIERB/pier.php?paper=12102904

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