Vol. 65

Front:[PDF file] Back:[PDF file]
Latest Volume
All Volumes
All Issues
2016-01-21

Novel Broadband Equalizer Optimization Technique for High-Speed Digital System Designs

By Shaowu Huang and Beomtaek Lee
Progress In Electromagnetics Research B, Vol. 65, 143-155, 2016
doi:10.2528/PIERB15110603

Abstract

In this paper, a novel broadband equalizer optimization technique is introduced for high-speed digital system designs. Through effectively compensating both conductor loss and dielectric loss, this technique provides a new solution to find optimal equalizer for high-speed signaling over printed circuit board (PCB) with continuous time linear equalizer (CTLE) as an application. The coefficients of CTLE are quickly identified through searching the minimum of the variation of total transfer functions over the low-mid frequency range. Channel simulations with different server interfaces of 12 Gbps and 25 Gbps are performed, respectively. Simulation results are presented to validate the technique.

Citation


Shaowu Huang and Beomtaek Lee, "Novel Broadband Equalizer Optimization Technique for High-Speed Digital System Designs," Progress In Electromagnetics Research B, Vol. 65, 143-155, 2016.
doi:10.2528/PIERB15110603
http://www.jpier.org/PIERB/pier.php?paper=15110603

References


    1. Hall, H. and H. L. Heck, Advanced Signal Integrity for High-speed Digital Designs, John Wiley & Sons, 2011.

    2. Lee, B., M. Mazumder, and R. Mellitz, "High speed differential I/O overview and design challenges on Intel enterprise server platforms," IEEE Symp. Electromagn. Compat., 779-784, Aug. 14-19, 2011.

    3. Beyene, W. T., "The design of continuous-time linear equalizers using model order reduction techniques," Proceedings of IEEE Electrical Performance of Electronic Packaging (EPEP), 187-190, Oct. 2008.

    4. Holdenried, C., R. Bespalko, S. Sadr, and K. Walsh, "Design challenges of RX equalizer and DFE design at 16 GT/s,", PCI-SIG, 2013.

    5. Parikh, S., T. Kao, Y. Hidaka, J. Jiang, A. Toda, S. Mcleod, W. Walker, Y. Koyanagi, T. Shibuya, and J. Yamada, "A 32 Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28 nm CMOS," 2013 IEEE International Solid-State Circuits Conference (ISSCC), 2013.

    6. Kimura, H., et al., "A 28 Gb/s 560 mW multi-standard SerDes with single-stage analog front-end and 14-tap decision feedback equalizer in 28 nm CMOS," IEEE Journal of Solid-State Circuits, Vol. 49, No. 12, 3091-3103, 2014.
    doi:10.1109/JSSC.2014.2349974

    7. Huang, S. and B. Lee, "New broadband equalizer optimization technique for digital system designs," 2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS), San Jose, CA, Oct. 25-28, 2015.

    8. Li, C., et al., "Silicon photonic transceiver circuits with microring resonator bias-based wavelength stabilization in 65 nm CMOS," IEEE Journal of Solid-State Circuits, Vol. 49, No. 6, 1419-1436, 2014.
    doi:10.1109/JSSC.2014.2321574

    9. Zhang, B., K. Khanoyan, H. Hatamkhani, H. Tong, K. Hu, S. Fallahi, K. Vakilian, and A. Brewster, "3.1 A 28 Gb/s multi-standard serial-link transceiver for backplane applications in 28 nm CMOS," 2015 IEEE International Solid-State Circuits Conference (ISSCC), 1-3, 2015.

    10. Yuan, S., Z. Wang, X. Zheng, W. Jia, L. Wu, C. Zhang, and Z. Wang, "10 Gbit/s serial link receiver with speculative decision feedback equaliser using mixed-signal adaption in 65 nm CMOS technology," Electronics Letters, Vol. 51, No. 21, 1645-1647, 2015.
    doi:10.1049/el.2015.1318

    11. Kim, M., J. Bae, U. Ha, and H.-J. Yoo, "A 24-mW 28-Gb/s wireline receiver with low-frequency equalizing CTLE and 2-tap speculative DFE," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1610-1613, 2015.
    doi:10.1109/ISCAS.2015.7168957

    12. Wang, H., B. Yan, Z. Wang, and R.-M. Xu, "A broadband microwave gain equalizer," Progress In Electromagnetics Research Letters, Vol. 33, 63-72, 2012.
    doi:10.2528/PIERL12052309

    13. Inmet, A. and M. I. Ann Arbor, "Adjustable mm-wave gain equalizers," Microwave Journal, Aug. 3, 2007.

    14. Kampa, J. and K. Petrus, "Microwave amplitude equalizer," 13th International Conference on Microwaves, Radar and Wireless Communications, Vol. 1, 37-40, 2000.

    15. Zhou, T.-F., Y. Zhang, and R.-M. Xu, "Research on the millimeter wave gain equalizer," IEEE International Conference on Microwave Technology & Computational Electromagnetics (ICMTCE), 180-182, May 2011.

    16. Silapunt, R. and D. Torrungrueng, "Theoretical study of microwave transistor amplifier design in the conjugately characteristic-impedance transmission line (CCITL) system using a bilinear transformation approach," Progress In Electromagnetics Research, Vol. 120, 309-326, 2011.
    doi:10.2528/PIER11080504

    17. Khalaj-Amirhosseini, M., "Analysis of coupled or single nonuniform transmission lines using step-by-step numerical integration," Progress In Electromagnetics Research, Vol. 58, 187-198, 2006.

    18. Raphaeli, D. and A. Saguy, "Linear equalizers for Turbo equalization: A new optimization criterion for determining the equalizer taps," Proc. 2nd Intern. Symp. on Turbo Codes, 371-374, Brest, France, 2000.

    19. Patrick, K. D. and A. A. Abidi, "A 40-mW 55 Mb/s CMOS equalizer for use in magnetic storage read channels," IEICE Transactions on Electronics, Vol. 77, No. 5, 819-829, 1994.

    20. Lee, I., "Optimization of tap spacings for the tapped delay line decision feedback equalizer," IEEE Communications Letters, Vol. 5, No. 10, 429-431, 2001.
    doi:10.1109/4234.957384

    21. Su, T.-J., J.-C. Cheng, and C.-J. Yu, "An adaptive channel equalizer using self-adaptation bacterial foraging optimization," Optics Communications, Vol. 283, No. 20, 3911-3916, 2010.
    doi:10.1016/j.optcom.2010.06.007

    22. Song, E., J. Cho, J. Kim, Y. Shim, G. Kim, and J. Kim, "Modeling and design optimization of a wideband passive equalizer on PCB based on near-end crosstalk and reflections for high-speed serial data transmission," IEEE Transactions on Electromagnetic Compatibility, Vol. 52, No. 2, 410-420, 2010.
    doi:10.1109/TEMC.2010.2042452

    23. Hsu, H.-T., H.-W. Yao, K. Zaki, and A. E. Atia, "Synthesis of coupled-resonators group-delay equalizers," IEEE Transactions on Microwave Theory and Techniques, Vol. 50, No. 8, 1960-1968, 2002.
    doi:10.1109/TMTT.2002.801344