Vol. 42
Latest Volume
All Volumes
PIERM 114 [2022] PIERM 113 [2022] PIERM 112 [2022] PIERM 111 [2022] PIERM 110 [2022] PIERM 109 [2022] PIERM 108 [2022] PIERM 107 [2022] PIERM 106 [2021] PIERM 105 [2021] PIERM 104 [2021] PIERM 103 [2021] PIERM 102 [2021] PIERM 101 [2021] PIERM 100 [2021] PIERM 99 [2021] PIERM 98 [2020] PIERM 97 [2020] PIERM 96 [2020] PIERM 95 [2020] PIERM 94 [2020] PIERM 93 [2020] PIERM 92 [2020] PIERM 91 [2020] PIERM 90 [2020] PIERM 89 [2020] PIERM 88 [2020] PIERM 87 [2019] PIERM 86 [2019] PIERM 85 [2019] PIERM 84 [2019] PIERM 83 [2019] PIERM 82 [2019] PIERM 81 [2019] PIERM 80 [2019] PIERM 79 [2019] PIERM 78 [2019] PIERM 77 [2019] PIERM 76 [2018] PIERM 75 [2018] PIERM 74 [2018] PIERM 73 [2018] PIERM 72 [2018] PIERM 71 [2018] PIERM 70 [2018] PIERM 69 [2018] PIERM 68 [2018] PIERM 67 [2018] PIERM 66 [2018] PIERM 65 [2018] PIERM 64 [2018] PIERM 63 [2018] PIERM 62 [2017] PIERM 61 [2017] PIERM 60 [2017] PIERM 59 [2017] PIERM 58 [2017] PIERM 57 [2017] PIERM 56 [2017] PIERM 55 [2017] PIERM 54 [2017] PIERM 53 [2017] PIERM 52 [2016] PIERM 51 [2016] PIERM 50 [2016] PIERM 49 [2016] PIERM 48 [2016] PIERM 47 [2016] PIERM 46 [2016] PIERM 45 [2016] PIERM 44 [2015] PIERM 43 [2015] PIERM 42 [2015] PIERM 41 [2015] PIERM 40 [2014] PIERM 39 [2014] PIERM 38 [2014] PIERM 37 [2014] PIERM 36 [2014] PIERM 35 [2014] PIERM 34 [2014] PIERM 33 [2013] PIERM 32 [2013] PIERM 31 [2013] PIERM 30 [2013] PIERM 29 [2013] PIERM 28 [2013] PIERM 27 [2012] PIERM 26 [2012] PIERM 25 [2012] PIERM 24 [2012] PIERM 23 [2012] PIERM 22 [2012] PIERM 21 [2011] PIERM 20 [2011] PIERM 19 [2011] PIERM 18 [2011] PIERM 17 [2011] PIERM 16 [2011] PIERM 14 [2010] PIERM 13 [2010] PIERM 12 [2010] PIERM 11 [2010] PIERM 10 [2009] PIERM 9 [2009] PIERM 8 [2009] PIERM 7 [2009] PIERM 6 [2009] PIERM 5 [2008] PIERM 4 [2008] PIERM 3 [2008] PIERM 2 [2008] PIERM 1 [2008]
2015-04-28
Analytical Modeling and Analysis of through Silicon Vias (TSVs ) in High Speed Three-Dimensional System Integration
By
Progress In Electromagnetics Research M, Vol. 42, 49-59, 2015
Abstract
This paper gives a comprehensive study on the modeling and design challenges of Through Silicon Vias (TSVs) in high speed three dimensional (3D) system integration. To investigate the propagation characteristics incurred by operations within the ultra-broad band frequency range, we propose an equivalent circuit model which accounts for rough sidewall effect and high frequency effect. A closed-form expression for TSV metal oxide semiconductor (MOS) capacitance in both depletion and accumulation regions is proposed. The coupling of TSV arrays and near and far field effect on crosstalk analysis are performed using 3D EM field solver. Based on the TSV circuit model, we optimize the TSVs' architecture and manufacturing process parameters and develop effective design guidelines for TSVs which could be used to resolve the signal integrity issues arising at high frequency data transmission in 3D ICs.
Citation
Md Amimul Ehsan Zhen Zhou Yang Yi , "Analytical Modeling and Analysis of through Silicon Vias (TSVs ) in High Speed Three-Dimensional System Integration," Progress In Electromagnetics Research M, Vol. 42, 49-59, 2015.
doi:10.2528/PIERM15021404
http://www.jpier.org/PIERM/pier.php?paper=15021404
References

1. Che, F. X., W. N. Putra, A. Heryanto, A. Trigg, S. Gao, and C. L. Gan, "Numerical and experimental study on Cu protrusion of Cu-filled through-silicon vias (TSV)," Proc. IEEE Int. 3DIC Conf., 1-6, 2012.

2. Swaminathan, M., "Electrical design and modeling challenges for 3D system integration," Design Conference 2012, 2012.

3. Banerjee, K., S. J. Souri, P. Kapur, and K. C. Saraswat, "3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration," Proc. IEEE, Vol. 89, No. 5, 602-633, 2001.
doi:10.1109/5.929647

4. Koyanagi, M., H. Kurino, K.-W. Lee, K. Sakuma, N. Miyakawa, and H. Itani, "Future system-on-silicon LSI chips," IEEE Micro., Vol. 18, No. 4, 17-22, 1998.
doi:10.1109/40.710867

5. Zhang, L., H. Y. Li, S. Gao, and C. S. Tan, "Achieving stable Through-Silicon Via (TSV) capacitance with oxide fixed charge," IEEE Elect. Device Lett., Vol. 32, No. 5, 668-670, 2011.
doi:10.1109/LED.2011.2111351

6. Salah, K., H. Ragai, Y. Ismail, and A. E. Rouby, "Equivalent lumped element models for various n-port Through Silicon Vias networks," Proc. 16th ASP-DAC, 176-183, 2011.

7. Ehsan, M. A., Z. Zhou, and Y. Yi, "Electrical modeling and analysis of sidewall roughness of Through Silicon Vias in 3D integration," Proc. IEEE Int. Conf. EMC, 52-56, Aug. 2014.

8. Bandyopadhyay, T., R. Chatterjee, D. Chung, M. Swaminathan, and R. Tummala, "Electrical modeling of Through Silicon and Package Vias," Proc. IEEE Int. Conf. 3D Syst. Integr., 1-8, Sep. 2009.

9. ITU-D, "Measuring the information society 2011," International Telecommunications Union (ITU), 2011.

10. Federal Communications Commission (FCC), "National broadband plan,", http://www.broadband.gov-/plan/executive-summary/, 2011.

11. Pi, Z. and F. Khan, "An introduction to millimeter-wave mobile broadband systems," IEEE Communications Magazine, Vol. 49, No. 6, 101-107, 2011.
doi:10.1109/MCOM.2011.5783993

12. Liu, D., U. Pfeiffer, J. Gryzb, and B. Gaucher, Advanced Millimeter Wave Technologies: Antennas, Packaging, and Circuits, J. Wiley & Sons, 2009.
doi:10.1002/9780470742969

13. Oprysko, M., "Building millimeter-wave circuits in silicon," Proc. IEEE Radio and Wireless Conf. on Adv. in RF and High Speed Syst. Integr., 2004.

14. Nakamura, T., H. Kitada, Y. Mizushima, N. Maeda, K. Fujimoto, and T. Ohba, "Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects," Proc. IEEE Int. Conf. 3D Syst. Integr., 1-4, Jan./Feb. 2012.

15. Ndip, I., B. Curran, K. Lobbicke, S. Guttowski, H. Reichl, K. Lang, and H. Henke, "High-frequency modeling of TSVs for 3-D chip integration and silicon interposers considering skin-effect, dielectric quasi-TEM and slow-wave modes," IEEE Trans. Compon. Packag. Manuf. Technol., Vol. 1, No. 10, 1627-1641, Oct. 2011.
doi:10.1109/TCPMT.2011.2164915

16. Yi, Y. and Y. Zhou, "Differential Through-Silicon-Vias modeling and design optimization to benefit 3D IC performance," Proc. IEEE 22nd Conf. EPEPS, 195-198, Oct. 2013.

17. Yi, Y. and Y. Zhou, "A novel circuit model for multiple Through-Silicon-Vias (TSVs)," Proc. IEEE Int. Conf. 3DIC, 1-4, Sep. 2013.

18. Yi, Y., Y. Zhou, X. Fu, and F. Shen, "Modeling differential Through-Silicon-Vias (TSVs) with voltage dependent and nonlinear capacitance," J. of Selectd. Area. Microelect., Vol. 3, No. 6, 27-36, Jun. 2013.

19. Xu, C., H. Li, R. Suaya, and K. Banerjee, "Compact AC modeling and performance analysis of Through-Silicon Vias in 3-D ICs," IEEE Trans. Electron Devices, Vol. 57, No. 12, 3405-3417, 2010.
doi:10.1109/TED.2010.2076382

20. Engin, A. E. and S. R. Narasimhan, "Modeling of crosstalk in Through Silicon Vias," IEEE Trans. Electromagn. Compatibil., Vol. 55, No. 1, 149-158, Feb. 2013.
doi:10.1109/TEMC.2012.2206816

21. Xie, B., M. Swaminathan, K. J. Han, and J. Xie, "Coupling analysis of Through-Silicon Via (TSV) arrays in silicon interposers for 3D systems," Proc. IEEE Int. Symp. EMC, 16-21, Aug. 2011.

22. Han, K. J., M. Swaminathan, and T. Bandyopadhyay, "Electromagnetic modeling of Through-Silicon Via (TSV) interconnections using cylindrical modal basis functions," IEEE Trans. Adv. Packag., Vol. 33, No. 4, 804-817, 2010.
doi:10.1109/TADVP.2010.2050769

23. Ramo, S., J.Whinnery, and T. Duzer, Fields and Waves in Communication Electronics, 3rd Ed., Wiley, New York, 1994.

24. Ndip, I., K. Zoschke, K. Lobbicke, M. J. Wolf, S. Guttowski, H. Reichl, K.-D. Lang, and H. Henke, "Analytical, numerical-, and measurement-based methods for extracting the electrical parameters of Through Silicon Vias (TSVs)," IEEE Trans. Compon. Packag. Manuf. Technol., Vol. 4, No. 3, 504-515, Mar. 2014.
doi:10.1109/TCPMT.2013.2279688

25. Tsang, L., H. Braunisch, R. Ding, and X. Gu, "Random rough surface effects on wave propagation in interconnects," IEEE Trans. Adv. Packag., Vol. 33, No. 4, 839-856, Nov. 2010.
doi:10.1109/TADVP.2010.2089789

26. http://www.ansys.com/Products/Simulation+Technology/Electronics/Signal+Integrity/ANSYS+HFSS.

27. Katti, G., M. Stucchi, K. de Meyer, and W. Dehaene, "Electrical modeling and characterization of through-silicon-via for three dimensional ICs," IEEE Trans. Electron Devices, Vol. 57, No. 1, 256-262, Jan. 2010.
doi:10.1109/TED.2009.2034508

28. Sze, S. M., Physics of Semiconductor Devices, Wiley, New York, 1981.

29. Wang, G., R. W. Dutton, and C. S. Rafferty, "Device level simulation of wave propagation along metal-insulator-semiconductor interconnects," IEEE Trans. Microwave Theory and Tech., Vol. 50, No. 4, 1127-1136, Apr. 2002.
doi:10.1109/22.993416

30. Bandyopadhyay, T., K. J. Han, D. Chung, R. Chatterjee, M. Swaminathan, and R. Tummala, "Rigorous electrical modeling of Through Silicon Vias (TSVs) with MOS capacitance effects," IEEE Trans. CPMT, Vol. 1, No. 6, 893-903, Jun. 2011.

31. Katti, G., M. Stucchi, J. V. Olmen, K. de Meyer, and W. Dehaene, "Through-Silicon-Via capacitance reduction technique to benefit 3-D IN performance," IEEE Electron Dev. Lett., Vol. 31, No. 6, 549-551, Jun. 2001.
doi:10.1109/LED.2010.2046712

32. He, X., W. Wang, and Q. Cao, "Crosstalk modeling and analysis of Through-Silicon-Via connection in 3D integration," PIERS Proceedings, 857-861, Taipei, Mar. 25-28, 2013.