In this study, we propose an asymmetrical input transformer for the input baluns in a differential RF CMOS power amplifier to minimize the loss induced by the input transformer. To reduce the loss caused by the magnetic coupling between the primary and secondary parts of a typical transformer, we modify the interconnection between the input transformer and the differential input of the driver stage. Unlike a typical transformer, the primary and secondary parts of the proposed transformer are directly connected to the input of the driver stage. As a result, the input signal in the primary part can reach one of the inputs of the differential driver stage, thereby reducing the loss caused by magnetic coupling. To verify the functionality of the proposed asymmetrical input transformer, we designed a 4.5-GHz differential CMOS power amplifier for IEEE 802.11n WLAN applications with 64-QAM, 9.6 dB PAPR, and a bandwidth of 20 MHz. The designed power amplifier is fabricated using the 180-nm SOI RF CMOS process. The measured maximum linear output power is 17.59 dBm with a gain of 29.23 dB.
2. Formato, R. A., "Variable Z0 antenna technology: A new approach for IoT wireless," Int. J. Microw. Wirel. Technol., Vol. 7, 195-203, 2015.
3. Jeong, H., G. Ko, H. Shin, I. Kang, J. Yoo, and C. Park, "A CMOS power amplifier using split input and output transformers to minimize its chip area," Microw. Opt. Technol. Lett., Vol. 58, 1443-1446, 2016.
4. Ryu, N., S. Jang, K. C. Lee, and Y. Jeong, "CMOS doherty amplifier with variable balun transformer and adaptive bias control for wireless LAN application," IEEE J. Solid-State Circuits, Vol. 49, 1356-1365, 2014.
5. Ryu, N., B. Park, and Y. Jeong, "A fully integrated high efficiency RF power amplifier for WLAN application in 40 nm standard CMOS process," IEEE Micro. Wirel. Compon. Lett., Vol. 25, 382-384, 2015.
6. Seo, D., S.-H. Lim, H.-J. Ahn, and C. Park, "1.9-GHz CMOS power amplifier using a current source to enhance its dynamic range," Microw. Opt. Technol. Lett., Vol. 56, 1886-1891, 2014.
7. Seo, D. and C. Park, "Split driver stages for a switching mode power amplifier with multipairs of power stages," Microw. Opt. Technol. Lett., Vol. 56, 2341-2345, 2014.
8. Hwang, H., C. Lee, J. Park, and C. Park, "A current-shared cascade structure with an auxiliary power regulator for switching mode RF power amplifiers," IEEE Trans. Microw. Theory Tech., Vol. 62, 2711-2722, 2014.
9. Park, J., C. Lee, and C. Park, "Study of stability problems due to the undesired coupling of a RF power amplifier using a distributed active transformer," Microelectron. J., Vol. 46, 1046-1052, 2015.
10. Lee, C. and C. Park, "Switching-mode CMOS power amplifier using a differentially coupled series inductor," Progress In Electromagnetics Research Letters, Vol. 81, 59-64, 2019.
11. Choi, H., Y. Lee, and S. Hong, "A digital polar CMOS power amplifier with a 102-dB power dynamic range using a digitally controlled bias generator," IEEE Trans. Microw. Theory Tech., Vol. 62, 579-589, 2014.
12. Liu, G., P. Haldi, T.-J. K. Liu, and A. M. Niknejad, "Fully integrated CMOS power amplifier with efficiency enhancement at power back-off," IEEE J. Solid-State Circuits, Vol. 43, 600-609, 2008.
13. Yang, H.-S., J.-H. Chen, and Y.-J. Chen, "A 1.2-V 90-nm fully integrated compact CMOS linear power amplifier using the coupled L-shape concentric vortical transformer," IEEE Trans. Microw. Theory Tech., Vol. 62, 2689-2699, 2014.
14. Yoon, Y., J. Kim, H. Kim, K. H. An, O. Lee, C.-H. Lee, and J. S. Kenney, "A dual-mode CMOS RF power amplifier with integrated tunable matching network," IEEE Trans. Microw. Theory Tech., Vol. 60, 77-88, 2012.
15. Ham, J., J. Bae, M. Seo, H. Lee, K. C. Hwang, K.-Y. Lee, and Y. Yang, "Dual-mode supply modulator for CMOS envelope tracking power amplifier integrated circuit," Microw. Opt. Technol. Lett., Vol. 57, 1338-1343, 2015.
16. Kim, H., J. Bae, J. Ham, J. Gu, M. Seo, K. C. Hwang, K.-Y. Lee, C.-S. Park, and Y. Yang, "Efficiency enhanced CMOS digitally controlled dynamic bias switching power amplifier for LTE," Microw. Opt. Technol. Lett., Vol. 57, 2315-2321, 2015.
17. Kang, J., J. Yoon, K. Min, D. Yu, J. Nam, Y. Yang, and B. Kim, "A highly linear and efficient differential CMOS power amplifier with harmonic control," IEEE J. Solid-State Circuits, Vol. 41, 1314-1322, 2006.
18. Yoo, J., C. Lee, I. Kang, M. Son, Y. Sim, and C. Park, "2.4-GHz CMOS linear power amplifier for IEEE 802.11n WLAN applications," Microw. Opt. Technol. Lett., Vol. 59, 546-550, 2017.
19. Yan, T., H. Liao, C. Li, and R. Huang, "A 2-GHz fully-differential CMOS power amplifier with virtual grounds to suppress ground bounce," Microw. Opt. Technol. Lett., Vol. 49, 2780-2784, 2007.
20. Aoki, I., S. D. Kee, D. B. Rutledge, and A. Hajimiri, "Fully integrated CMOS power amplifier design using the distributed active-transformer architecture," IEEE J. Solid-State Circuits, Vol. 37, 371-383, 2002.
21. Aoki, I., S. D. Kee, D. B. Rutledge, and A. Hajimiri, "Distributed active transformer-a new power-combining and impedance-transformation technique," IEEE Trans. Microw. Theory Tech., Vol. 50, 316-331, 2002.
22. Guanella, G., "New method of impedance matching in radio frequency circuits," Brown Boveri Rev., Vol. 31, 327-329, 1944.
23. Park, C., D. H. Lee, J. Han, and S. Hong, "Tournament-shaped magnetically coupled power-combiner architecture for RF CMOS power amplifier," IEEE Trans. Microw. Theory Tech., Vol. 55, 2034-2042, 2007.
24. Afsahi, A., A. Behzad, V. Magoon, and L. E. Larson, "Linearized dual-band power amplifiers with integrated baluns in 65nm CMOS for a 2 × 2 802.11n MIMO WLAN SoC," IEEE J. Solid-State Circuits, Vol. 45, 955-966, 2010.
25. Liao, H.-H., H. Jiang, P. Shanjani, J. King, and A. Behzad, "A fully integrated 2 × 2 power amplifier for dual band MIMO 802.11n WLAN application using SiGe HBT Technology," IEEE J. Solid-State Circuits, Vol. 44, 1361-1371, 2009.