This paper investigates the use of the guard traces to improve the Time-Domain Transmission (TDT) waveform and eye diagram for a flat spiral delay line. Two types of guard trace are adopted to implement and analysis in microstrip line and stripline structures. One is Two Grounded Vias type Guard Trace (TGVGT) and the other is Open-Stub type Guard Trace (OSGT). The time-domain analysis results by HSPICE and the associated simple circuit modeling is presented. According to the simulation results, the original TDT crosstalk noises can be reduced by about 80% when using TGVGTs or OSGTs in a stripline structure and by about 60% when using TGVGTs in a microstrip line structure. Additionally, the eye diagrams also can obtain improvement. The crosstalk noise cancelation mechanisms of the flat spiral routing scheme on TGVGTs and OSGTs are investigated by graphic method. In addition, how the degradation for the OSGT inserted into the flat spiral delay line in microstrip structure is clearly investigated. A flat spiral delay line inserted into TGVGTs and OSGTs both can obtain good improvements of the TDT waveform and eye diagram in a stripline structure. Moreover, adding OSGTs to the flat spiral routing scheme is easily accomplished due to the open end of OSGTs. Finally, HSPICE simulation and time-domain measurements of crosstalk noises of TDT waveforms, and eye diagrams are use to validate the proposed structure and analysis.
"Comparisons of Improvements on Time-Domain Transmission Waveform and Eye Diagram for Flat Spirral Delay Line Between Two Types Guard Traces in High-Speed Digital Circuits," Progress In Electromagnetics Research B,
Vol. 31, 89-115, 2011. doi:10.2528/PIERB11041702
1. Wu, R. B. and F. L. Chao, "Laddering wave in serpentine delay line," IEEE Trans. Comp., Packag., Manuf. Technol. B, Vol. 18, 644-650, Nov. 1995.
2. Wu, R. B., "Flat spiral delay line design with minimum crosstalk penalty ," IEEE Trans. Comp., Packag., Manuf. Technol. B, Vol. 19, 397-402, May 1996.
3. Guo, W. D., G. H. Shiue, and R. B. Wu, "Comparison between serpentine and flat spiral dealay lines on tranaient re°ection/transmission waveforms and eye diagrams," IEEE Trans. Microwave Theory Tech., Vol. 54, 1379-1387, Apr. 2006. doi:10.1109/TMTT.2006.883654
4. Ladd, D. N. and G. I. Costache, "SPICE simulation used to characterize the crosstalk reduction effect of additional tracks grounded with vias on printed circuit boards," IEEE Trans. Circuits Syst. II, Vol. 39, 342347, Jun. 1992. doi:10.1109/82.145291
5. Nova, I., B. Eged, and L. Hatvani, "Measurement by vector-network analyzer and simulation of crosstalk reduction on printed circuit boards with additional center traces," Proc. IEEE Instrument Measurement Technol., Vol. 269, No. 274, Irvine, CA, May 1993.
6. Li, Z., Q.Wang, and C. Shi, "Application of guard traces with vias in the RF PCB layout," Proc. IEEE Int. Symp. Electromagnetic Compat., 771-774, May 2002.
7. Suntives, A., A. Khajooeizadeh, and R. Abhari, "Using via fences for crosstalk reduction in PCB circuits," Proc. IEEE Int. Symp. Electromagnetic Compat., 34-37, Aug. 2006.
8. Nara, S. and K. Koshiji, "Study of delay time characteristics of multi-layered hyper-shield meander line," Proc. IEEE Int. Symp. Electromagnetic Compat., 760-763, Aug. 200.
9. Shiue, G. H., C. Y. Chao, W. D. Guo, and R. B. Wu, "Improvement of time-domain transmission waveform in serpentine delay line with guard traces," Proc. IEEE Int. Symp. Electromagnetic Compat., 1-5, Jul. 2007.
10. Shiue, G. H., C. Y. Chao, and R. B. Wu, "Guard trace design for improvement on transient waveforms and eye diagrams of serpentine delay line," IEEE Trans. Adv. Packag., Vol. 33, No. 4, 1051-1060, Nov. 2010. doi:10.1109/TADVP.2010.2064165
11. Shiue, G. H., J. H. Shiu, P. W. Chiu, Z. H. Zhang, M. N. Yeh, and W. C. Ku , "Improvements of time-domain transmission waveform and eye diagram of serpentine delay line using guard trace stubs in stripline structure," 2010 IEEE-EPEPS, 249-252, Auxtin, TE, Oct. 24-27, 2010.
12. Feller, A., H. R. Kaupp, and J. J. Digiacomo, "Crosstalk and reflections in high-speed digital systems," Proc. Fall Joint Comput. Conf., 512-525, 1965.
13. Cheng, Y. S., W. D. Guo, G. H. Shiue, H. H. Cheng, C. C. Wang, and R. B. Wu, "Fewest vias design for microstrip guard trace by using overlying dielectric ," 2008 IEEE-EPEP, 321-324, San Jose, CA, Oct. 27-29, 2008.
14. Hall, S. H. and H. L. Heck, Advanced Signal Integrity for High-Speed Digital System Design, Chapter 4, Wiley, Hoboken, NJ, 2009. doi:10.1002/9780470423899
15. Chiu, P. W. and G. H. Shiue, "The impact of guard trace with open stub on time-domain waveform in high-speed digital circuits," 2009 IEEE-EPEPS, 219-222, Portland, OR, Oct. 19-21, 2009.
16. Edwards, T. C. and M. B. Steer, Foundations of Interconnect and Microstrip Design, Chapter 7, Wiley, New York, 2000.