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2022-10-26
A Hot-via Chip-to-Substrate Interconnect for Ultra-Compact System Package Application Up to W Band
By
Progress In Electromagnetics Research Letters, Vol. 107, 75-81, 2022
Abstract
A hot-via chip-to-substrate interconnect with its operation frequency up to W-band for ultracompact radio frequency (RF) system in package (SIP) is reported in this paper. In order to improve the accuracy of the simulation model in millimeter wave bands, a trapezoidal platform model is established for modeling the RF performance of the hot-via which is formed by inductively coupled plasma (ICP) etching process. A three hot-vias structure in a gallium arsenide (GaAs) chip is employed to form a Ground-Signal-Ground (GSG) transition structure. Bumps on the Silicon substrate are designed as a half quasi-coaxial structure to make it compatible with the assembly process of SIP. A full-wave simulation model is established for a hot-via chip-to-substrate interconnect structure with HFSS, based on which structural parameters, such as the gap between the hot-vias and the radius of the quasi-coaxial structure, are optimized for the best performance over 92-96 GHz. A prototype of the hot-via chip-to-substrate interconnects in their back-to-back connected form has been fabricated. Measured results demonstrate that the overall insertion loss is less than 1.85 dB, and the return loss is better than 12 dB from 92 GHz to 96 GHz.
Citation
Jiapeng Yang, Bingqing Zou, Jinping Xu, and Jun Zhou, "A Hot-via Chip-to-Substrate Interconnect for Ultra-Compact System Package Application Up to W Band," Progress In Electromagnetics Research Letters, Vol. 107, 75-81, 2022.
doi:10.2528/PIERL22020201
References

1. Liu, G., A. Trasser, A. Ulusoy, and H. Schumacher, "Low-loss, low-cost, IC-to-board bondwire interconnects for millimeter-wave applications," 2011 IEEE MTT-S International Microwave Symposium, 1-1, 2011.

2. Schulz, A., D. Stöpel, T. Welker, R. Müller, F. Wollenschläger, and J. Müller, "Optimized wire-bond transitions for microwave applications up to 67 GHz using the low loss LTCC material DuPont 9k7," 2013 Eurpoean Microelectronics Packaging Conference (EMPC), 1-5, 2013.

3. Wu, W. C., L. H. Hsu, E. Y. Chang, et al. "60 GHz broadband MS-to-CPW hot-via flip chip interconnects," IEEE Microwave and Wireless Components Letters, Vol. 17, No. 11, 784-786, 2007.
doi:10.1109/LMWC.2007.908053

4. Zhou, J., J. Yang, and Y. Shen, "3D heterogeneous integration technology using hot via MMIC and silicon interposer with millimeter wave application," 2017 IEEE/MTT-S International Microwave Symposium --- IMS, 499-502, 2017.
doi:10.1109/MWSYM.2017.8058608

5. Mahon, J. C., M. Clark, and P. Katzin, "A surface mount 45 to 90 GHz low noise amplifier using novel hot-via interconnection," 2018 IEEE/MTT-S International Microwave Symposium --- IMS, 293-296, 2018.
doi:10.1109/MWSYM.2018.8439302

6. Chiu, J. C., S. C. Hsiao, P. K. Tseng, et al. "An ultracompact, low-cost, and high-performance RF package technique for Wi-Fi FEM applications," IEEE Microwave and Wireless Components Letters, Vol. 30, No. 3, 265-267, 2020.
doi:10.1109/LMWC.2020.2971389