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PIER PIER B PIER C PIER M PIER Letters PIER Photonics
2007-12-12
Analysis of Capacitance Across Interconnects of Low-k Dielectric Used in a Deep Sub-Micron CMOS Technology
By
Sonanvane Avinash,

    Mr. Sonanvane Avinash

    Department of Electronics

    North Maharashtra University

    India

    Homepage

Bhavana N. Joshi,

    Dr. Bhavana N. Joshi

    School of mechanical engineering

    Korea University

    South Korea

    Homepage

Ashok Mahajan

    Dr. Ashok Mahajan

    Department of Electronics

    North Maharashtra University

    India

    Homepage

Progress In Electromagnetics Research Letters, Vol. 1, 189-196, 2008
doi:10.2528/PIERL07112802 | Google Scholar

Abstract
The paper presents the detailed analysis of the interconnect capacitance, crosstalk time and peak crosstalk voltage. The dependency of the couple capacitance and fringe capacitance on the interconnect layer dimensions affects significantly to the interconnect capacitance. The peak crosstalk time obtained to be 13 femtoseconds for 9.6 femtoseconds of propagation delay, while the maximum crosstalk voltage obtained to be 178 mV.
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Citation
Sonanvane Avinash, Bhavana N. Joshi, and Ashok Mahajan, "Analysis of Capacitance Across Interconnects of Low-k Dielectric Used in a Deep Sub-Micron CMOS Technology," Progress In Electromagnetics Research Letters, Vol. 1, 189-196, 2008.
doi:10.2528/PIERL07112802
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