volume | PIER Journals

Abstract

This paper presents the design, co-simulation, and measurement of a two-stage broadband-cascaded low noise amplifier (LNA) using resistive terminated architecture. This architecture extends the bandwidth of a low-noise amplifier while maintaining a low NF and high flat gain S₂₁. The LNA is designed with planar technology and mounted on an FR4 substrate. The used InGaAs HEMT MGF4918D transistor from Mitsubishi technology has very low noise and operates up to 18 GHz. The reflection coefficient results of the studied LNA are lower than -10 dB. The stability is unconditional over the entire operating band. The measured gain is 14 dB ± 0.75 dB with a minimum NF noise figure of 2.9 ± 0.4 dB. The group delay is 0.605±0.145 ns. The 1 dB compression point is 10.16 dBm, and the third order input intercept point IIP3 is 14.25 dBm. Two-stage cascaded LNA has a total power consumption of 164 mW and occupies an area of 7x1.3 cm².

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Dr. Moustapha El Bakkali

Dr. Hanae Elftouh

Dr. Naima Amar Touhami

Dr. Imane Badaoui

Dr. Mohammed Lamsalli