volume | PIER Journals

Abstract

This paper presents the design and demonstration of an optimized land grid array (LGA) structure for low noise amplifier (LNA). In order to achieve better circuit performance, the novel chip-package co-design method based on embedded inductors is used. The optimized structure is accurately modeled by ANSYS software. S-parameter is utilized to help in understanding the contributing to the optimized LGA structure. The simulation results for the novel LNA co-design structure show the gain 14.35 dB (> 10 dB), input reflection coefficient -15.63 dB (< -10 dB), output reflection coefficient -24.43 dB (< -10 dB), reverse-isolation -44.7 dB (< -20 dB), and noise figure 2.99 dB (< 4 dB), and indicate that the optimized LGA structure based on embedded inductors is fully capable of supporting 5.8 GHz LNA application.

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Dr. Haiyan Sun

Dr. Wenjun Sun

Dr. Ling Sun

Dr. Jicong Zhao

Dr. Yihong Peng

Dr. Jiaen Fang

Dr. Xiaoyong Miao

Dr. Honghui Wang