In this study, we propose a transceiver architecture for wireless chip-to-chip communication using on/off keying (OOK) modulation. The proposed transceiver is composed of an oscillator, coils, an envelope detector, and a Schmitt trigger. Given that the oscillator itself acts as an OOK modulator, the transmitter is simplified. Additionally, because the oscillating signal is coupled between the transmitter and receiver coils, the reliability of the chip-to-chip communication is improved compared to a pulse-type transceiver. To verify the feasibility of the proposed transceiver, we design a transceiver using a 180 nm CMOS process. For a design with a 1.5 GHz oscillation frequency and 1 MHz digital input signal, we verify that the proposed transceiver successfully recovers the original digital signal.
2. Stucchi, M., D. Velenis, and G. Katti, "Capacitance measurements of two-dimensional and threedimensional IC interconnect structures by quasi-static C-V technique," IEEE Trans. Instrum. Meas., Vol. 61, 1979-1990, 2016.
doi:10.1109/TIM.2011.2179829
3. Fu, K., W.-S. Zhao, G. Wang, and M. Swaminathan, "A passive equalizer design for shielded differential through-silicon vias in 3-D IC," IEEE Microw. Wirel. Compon. Lett., Vol. 28, 768-770, 2018.
doi:10.1109/LMWC.2018.2854552
4. Kim, K., J. Ahn, and S. Ahn, "Detection of the interface-trap charge density and lateral nonuniformity of through-silicon vias," IEEE Microw. Wirel. Compon. Lett., Vol. 28, 422-424, 2018.
doi:10.1109/LMWC.2018.2822731
5. Liu, X., Z. Zhu, Y. Yang, R. Ding, and Y. Li, "Electrical modeling and analysis of differential dielectric-cavity through-silicon via array," IEEE Microw. Wirel. Compon. Lett., Vol. 27, 618-620, 2017.
doi:10.1109/LMWC.2017.2711563
6. Lee, W.-C., B.-W. Min, J. C. Kim, and J.-M. Yook, "Silicon-core coaxial through silicon via for low-loss RF si-interposer," IEEE Microw. Wirel. Compon. Lett., Vol. 27, 428-430, 2017.
doi:10.1109/LMWC.2017.2690826
7. Yook, J.-M., D. Kim, and J. Kim, "Compact and low-profile GaN hybrid-IC based on TSV Siinterposer technology," Microw. Opt. Technol. Lett., Vol. 59, 1087-1092, 2017.
doi:10.1002/mop.30469
8. Lee, C., J. Park, J. Yoo, H. Cho, J. Choi, J. Cho, and C. Park, "Transceiver with inductive coupling for wireless chip-to-chip communication using a 50-nm digital CMOS process," Microelectron. J., Vol. 44, 852-859, 2013.
doi:10.1016/j.mejo.2013.07.006
9. Lee, M., C. Lee, and C. Park, "Transceiver for wireless power transfer using a cross-coupled oscillator for a wireless on-wafer test," IEEE Trans. Instrum. Meas., Vol. 66, 2097-2105, 2017.
doi:10.1109/TIM.2017.2677658
10. Lee, C., J. Park, and C. Park, "Zigzag-shaped coil array structure for wireless chip-to-chip communication applications," IEEE Trans. Electron Devices, Vol. 61, 3245-3251, 2014.
doi:10.1109/TED.2014.2333517
11. Kim, G.-S., M. Takamiya, and T. Sakurai, "A capacitive coupling interface with high sensitivity for wireless wafer testing," Proc. IEEE Int. Conf. 3D Syst. Integr., 1-5, Sep. 2009.
12. Yoshida, Y., K. Nose, Y. Nakagawa, K. Noguchi, Y. Morita, M. Tago, M. Mizuno, and T. Kuroda, "An inductive-coupling DC voltage transceiver for highly parallel wafer-level testing," IEEE J. Solid-State Circuits, Vol. 45, 2057-2065, 2010.
doi:10.1109/JSSC.2010.2061653
13. Tomita, K., R. Shinoda, T. Kuroda, and H. Ishikuro, "1-W 3.3–16.3-V boosting wireless power transfer circuits with vector summing power controller," IEEE J. Solid-State Circuits, Vol. 47, 2576-2085, 2012.
doi:10.1109/JSSC.2012.2211698
14. Radecki, A., H. Chung, Y. Yoshida, N. Miura, T. Shidei, H. Ishikuro, and T. Kuroda, "6W/25mm2 inductive power transfer for non-contact wafer-level testing," Proc. IEEE Int. Solid-State Circuits Conf., 230-232, Feb. 2011.
15. Lee, C., J. Park, J. Yoo, and C. Park, "Study of the coil structure for wireless chip-to-chip communication applications," Progress In Electromagnetics Research Letters, Vol. 38, 127-136, 2013.
doi:10.2528/PIERL13022002
16. Lee, M., S. Cho, and C. Park, "30-GHz CMOS voltage-controlled oscillator using drain-gate coupled transformer to minimize the influences of parasitic components," Microw. Opt. Technol. Lett., Vol. 57, 1025-1027, 2015.
doi:10.1002/mop.29009
17. Shin, H., M. Lee, C. Lee, and C. Par, "A CMOS voltage-controlled oscillator using a cascode structure," Microw. Opt. Technol. Lett., Vol. 58, 1560-1563, 2016.
doi:10.1002/mop.29860
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