volume | PIER Journals

Abstract

A single-stage ultra-wideband (UWB) CMOS low noise amplifier (LNA) employing interstage matching inductor on conventional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is implemented in 0.18 μm CMOS technology for a 3 to 5 GHz ultra-wideband system. By careful optimization, an interstage inductor can increase the overall broadband gain while maintaining a low level of noise figure of an amplifier. The fabricated prototype has a measured power gain of +12.7 dB, input return loss of 18 dB, output return loss of 3 dB, reverse isolation of 35 dB, noise figure of 4.5 dB and input IP3 of -1 dBm at 4 GHz, while consuming 17 mW of DC dissipation at a 1.8 V supply voltage.

1. FCC "Final rule of the federal communications commission, 47 CFR Part 15, Sec. 503 ," Federal Register, Vol. 67, No. 95, May 2002. Google Scholar

2. Kim, C. W., M. S. Kang, P. T. Anh, and S. G. Lee, "An ultra-wideband CMOS low noise amplifier for 3-5 GHz UWB system," IEEE Journal of Solid State Circuits, Vol. 40, No. 2, 544-547, Feb. 2005.
doi:10.1109/JSSC.2004.840951 Google Scholar

3. Heydari, P. and D. Lin, "A performance optimized CMOS distributed LNA for UWB receivers," Proc. Int. Custom Integrated Circuits Conf., 330-333, Sep. 2005. Google Scholar

4. Chen, K. H., J. H. Lu, B. J. Chen, and S. L. Liu, "An ultra-wide-band 0.4-10 GHz LNA in 0.18 μm CMOS," IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 54, No. 3, 217-221, Mar. 2007.
doi:10.1109/TCSII.2006.886880 Google Scholar

5. Kim, S. S., Y. S. Lee, and T. Y. Yun, "High-gain wideband cmos low noise amplifier with two-stage cascode and simplified chebyshev filter," ETRI Journal, Vol. 29, No. 5, 670-672, Oct. 2007.
doi:10.4218/etrij.07.0207.0025 Google Scholar

6. Dorafshan, A. and M. Soleimani, "High-gain CMOS low noise amplifier for ultra wide-band wireless receiver," Progress In Electromagnetics Research C, Vol. 7, 183-191, 2009.
doi:10.2528/PIERC08090903 Google Scholar

7. Ismail, A. and A. Abidi, "A 3 to 10 GHz LNA using a wideband LC-ladder matching network," Proc. ISSCC Digital Tech., 384-385, 2004. Google Scholar

8. Kim, H. S., X. P. Li, and M. Ismail, "A 2.4 GHz CMOS low noise amplifier using an inter-stage matching inductor," Proc. Midwest Symposium on Circuits and Systems, 1040-1042, 1999. Google Scholar

9. Zhang, C., D. Huang, and D. Lou, "Optimization of cascode CMOS low noise amplifier using interstage matching network," Proc. Electron. Devices and Solid State Circuit Conf., 465-468, Dec. 2003. Google Scholar

10. Thomas, H. L., The Design of CMOS Radio-frequency Integrated Circuits, Cambridge University Press, 2004.

11. Razavi, B., Design of Analog CMOS Integrated Circuits, McGraw Hill, 2001.

12. Andersson, S., C. Svensson, and O. Drugge, "Wideband LNA for a multistandard wireless receiver in 0.18 μm process," Proc. European Solid-state Circuits Conf., 655-658, Sep. 2003. Google Scholar

Dr. Sew-Kin Wong

Dr. Fabian Kung Wai Lee

Dr. Siti Maisurah

Dr. Mohd Nizam Bin Osman

Dr. See Jin Hui