1. Banerjee, K., S. J. Souri, P. Kapur, and K. C. Saraswat, "3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and system-on-chip integration," Proc. IEEE, Vol. 89, No. 5, 602-633, 2001.
doi:10.1109/5.929647 Google Scholar
2. Kang, U., H.-J. Chung, et al. "8 Gb 3-D DDR3 DRAM using through-silicon-via technology," IEEE J. Solid-State Circuits, Vol. 45, No. 1, 111-119, 2010.
doi:10.1109/JSSC.2009.2034408 Google Scholar
3. Zhao, W. S., W. Y. Yin, and Y. X. Guo, "Electromagnetic compatibility-oriented study on through silicon single-walled carbon nanotube bundle via (TS-SWCNTBV) arrays," IEEE Trans. on Electromagn. Compat., Vol. 54, No. 1, 149-157, 2012.
doi:10.1109/TEMC.2011.2167336 Google Scholar
4. Van der Plas, G., P. Limaye, et al. "Design issues and considerations for low-cost 3-D TSV IC technology," IEEE J. Solid-State Circuits, Vol. 46, No. 1, 293-306, 2011.
doi:10.1109/JSSC.2010.2074070 Google Scholar
5. Selvanayagam, C., X. Zhang, R. Rajoo, and D. Pinjala, "Modeling stress in silicon with TSVs and its effect on mobility," IEEE Trans. on Compon. Packag. Manufac. Technol., Vol. 1, No. 9, 1328-1335, 2011.
doi:10.1109/TCPMT.2011.2158002 Google Scholar
6. Wu, B. and L. Tsang, "Full-wave modeling of multiple vias using differential signaling and shared antipad in multilayered high speed vertical interconnects," Progress In Electromagnetics Research, Vol. 97, 129-139, 2009.
doi:10.2528/PIER09091707 Google Scholar
7. Chaibi, M., T. Fernandez, et al. "Nonlinear modeling of trapping and thermal effects on GaAs and GaN MESFET/HEMT devices," Progress In Electromagnetics Research, Vol. 124, 163-186, 2012.
doi:10.2528/PIER11111102 Google Scholar
8. Faiz, J., B. M. Ebrahimi, and M. B. B. Sharifian, "Time stepping finite element analysis of broken bars fault in a three-phase squirrel-cage induction motor," Progress In Electromagnetics Research, Vol. 68, 53-70, 2007.
doi:10.2528/PIER06080903 Google Scholar
9. Singh, S. G. and C. S. Tan, "Thermal mitigation using thermal through silicon via (TTSV) in 3D ICs," Int. Microsyst. Packag. Assembly Circuits Technol. (IMPACT) Conf., 182-185, 2009. Google Scholar
10. Lee, Y.-J. and S. K. Lim, "Co-optimization and analysis of signal, power, and thermal interconnects in 3-D ICs," IEEE Trans. on CAD of ICs and Systems, Vol. 30, No. 11, 1635-1648, 2011.
doi:10.1109/TCAD.2011.2157159 Google Scholar
11. Hwang, L., K. L. Lin, and M. D. F. Wong, "Thermal via structural design in three-dimensional integrated circuits," Int. Symp. Quality Electron. Des. (ISQED), 103-108, 2012.
doi:10.1109/ISQED.2012.6187481 Google Scholar
12. Thein, T. T., C. L. Law, and K. Fu, "Frequency domain dynamic thermal analysis in GaAs HBT for power amplifier application," Progress In Electromagnetics Research, Vol. 118, 71-87, 2011.
doi:10.2528/PIER11050301 Google Scholar
13. Zhang, , J., M. O. Bloomfield, J. Q. Lu, R. J. Gutmann, and T. S. Cale, "Modeling thermal stresses in 3-D IC interwafer interconnects," IEEE Trans. on Semiconductor Manufacturing, 2006. Google Scholar
14. Zhang, C. B. and L. J. Li, "Characterization and design of through-silicon via arrays in three-dimensional ICs based on thermomechanical modeling," IEEE Trans. on Electron. Devices, Vol. 58, No. 2, 278-287, Feb. 2011.
doi:10.1109/TED.2010.2089987 Google Scholar
15. Selvanayagam, C. S., J. H. Lau, et al. "Nonlinear thermal stress/strain analysis of copper filled TSV (through silicon via) and their °ip-chip microbumps," Electron. Compon. Technol. Conf. (ECTC), 1073-1081, 2008. Google Scholar
16. Wang, X. P., W. Y. Yin, and S. He, "Multiphysics characterization of transient electrothermomechanical responses of through-silicon vias applied with a periodic voltage pulse," IEEE Trans. on Electron. Devices, Vol. 57, No. 6, 1382-1389, 2010.
doi:10.1109/TED.2010.2045676 Google Scholar
17. Bedrosian, G., "High-performance computing for finite element methods in low-frequency electro-magnetics," Progress In Electromagnetics Research, Vol. 7, 57-110, 1993. Google Scholar
18. Zhao, W. S., W. Y. Yin, X. P. Wang, and X. L. Xu, "Frequency-and temperature-dependent modeling of coaxial through-silicon via for 3-D ICs," IEEE Trans. on Electron. Devices, Vol. 58, No. 10, 3358-3368, 2011.
doi:10.1109/TED.2011.2162848 Google Scholar
19. Shi, Y. B., W. Y. Yin, J. F. Mao, P. G. Liu, and Q. H. Liu, "Transient electrothermal analysis of multilevel interconnects in the presence of ESD pulse using the nonlinear time-domain finite element method," IEEE Trans. on Electromagn. Compat., Vol. 51, No. 3, 774-783, 2009.
doi:10.1109/TEMC.2009.2017026 Google Scholar
20. Kong, F. Z., W. Y. Yin, J. F. Mao, and Q. H. Liu, "Electrothermo-mechanical characterizations of various wire bonding interconnects illuminated by an electromagnetic pulse," IEEE Trans. on Advanced Pack., Vol. 33, No. 3, 729-737, 2010.
doi:10.1109/TADVP.2010.2048902 Google Scholar
21. Irsigler, R. and S. AG, , Available online: http://www.sematech.org/meetings/archiv es/3d/8946/pres/Irsigler.pdf. Google Scholar
22. Nix, F. C. and D. MacNair, "The thermal expansion of pure metals: copper, gold, aluminum, nickel, and iron," Phys. Rev.,, Vol. 60, 597-605, 1941.
doi:10.1103/PhysRev.60.597 Google Scholar
23., http://www.sematech.org/meetings/archives/3d/8946/pres/Irsigler.pdf. Google Scholar
24. Zhao, W. S., X. P. Wang, and W. Y. Yin, "Electrothermal effects in high density through silicon via (TSV) arrays," Progress In Electromagnetics Research, Vol. 110, 125-145, 2010. Google Scholar