volume | PIER Journals

Abstract

Modern electronic products are increasingly based on high-speed, high-density circuitry operating at lower voltages. With such designs, the signal integrity (SI) in a poor printed circuit board layout is affected by noise and may become unstable. Crosstalk is a major source of noise that interferes with SI. Generally, crosstalk can be reduced by adding a guard trace between the victim and aggressor areas of the circuit. In addition, grounded vias can be added to the guard trace to help reduce crosstalk. Since a large number of grounded vias degrade the SI and reduce the flexibility of the circuit routing, we propose a method to calculate the optimal distance between grounded vias in the guard trace and determine the smallest number of vias required to achieve optimal performance in reducing crosstalk. We show by time-domain simulation that our method reduces the near-end crosstalk by 27.65% and the far-end crosstalk by more than 31.63% compared to the three-width rule. This is backed up by experimental results that show not only reductions of 34.49% and 37.55% for the near- and far-end crosstalk over time-domain, respectively, but also reductions of 2.1 dB and 3.3 dB for the near- and far-end crosstalk over the frequency-domain, respectively. Our results indicate that our method of optimal grounded vias has better performance than other methods.

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Prof. Wen-Tzeng Huang

Dr. Chi-Hao Lu

Prof. Ding-Bing Lin