This paper presents a D-band power amplifier for high-speed communication system. The capacitive effect of interconnection via on transistor performance at high frequency is analyzed and a new via structure is employed to reduce the capacitive effect. The on-chip matching technique for high frequency amplifier is analyzed and the thin-film microstrip line matching network is used, which is combined with biasing network to reduce RF signal loss and silicon cost. The amplifier is fabricated in 0.13-μm SiGe BiCMOS process. The experimental results show a 7 dB gain at 130 GHz with 3-dB bandwidth of 30-GHz. The input return loss is better than 10 dB over 23 GHz. In addition, this amplifier achieves saturated output power (Psat) of 4.5 dBm and input 1-dB gain compression point (P1dB) of -4.5 dBm. The chip size of implemented power amplifier is only 0.22mm2.
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